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Verilog Tutorial

Verilog is a Hardware Description Language( HDL ), introduced in 1985 by Gateway Design Systems. We can use Verilog to the design of ASICs and FPGAs in order to make digital circuits.

Note: This is an incomplete tutorial. We will complete it as soon as possible.

Table of Contents:

1. Overview of Verilog

2. Verilog Primitives

3. User Defined Primitives

4. Identifiers and Keywords

5. Verilog Data types

6. Verilog Operators

7. Asynchronous counter example: initial and always blocks

8. begin-end and fork-join

9. Blocking and non-blocking assignments

10. if-else statements

11. Looping statements

12. Coding styles: Multiplexer examples.

13. -under  construction-

Related Contents in Other websites:

• SOCcentral: Special topic -Verilog

• Verilog page: ASIC-World

• Verilog dot net

• Handbook on Verilog HDL

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